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Features

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Technology that opens the door to a new era of scientific and engineering computation.

High performance RISC microprocessor

This has been developed by Hitachi and is fabricated by them in leading edge 0.14 micrometer gate length CMOS technology.

It is characterised by :

(1) 64-bit addressing.

(2) excellent arithmetic performance and memory throughput.

(3) high reliability.

Pseudo Vector Processing (PVP) facility

To maximize the SR8000 Series' microprocessors' efficiency on large scale problems, they have the "pseudo vector processing" facility. This allows data to be fetched from main memory, in a pipelined manner, without stalling the succeeding instructions. The result is that data is fed from memory into the arithmetic units as effectively as in a vector type supercomputer.

CO-operative Micro-Processors in single Address Space(COMPAS) feature

The SR8000 Series' nodes are formed from multiple RISC microprocessors. These benefit from the "co-operative micro-processors in single address space" feature, which allows the rapid simultaneous start up of all microprocessors in a node. This allows each node to achieve performance comparable to a typical vector processor, while allowing a higher total performance when using them in parallel.

Multidimensional crossbar network

For effective, scalable, parallel processing, the network that interconnects the nodes is a key technology. As the number of nodes increases, maintaining system performance requires that the network scales in proportion. The SR8000 Series has a "multidimensional crossbar network". This delivers high performance in various communication patterns and scales with increasing number of nodes.

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Scalable from 32 GFLOPS to 7.3 TFLOPS.

SR8000 Series configurations cover a wide performance range.

These start with the entry level 32 GFLOPS system, and grow to the high end, 7.3 TFLOPS system, 230 times more powerful. The user can select most suitable configuration according to the computation needs and tasks. The latest air cooling techniques and high density packaging are used throughout. This results in the delivery of some 54 times (in the case of model G1) the performance of Hitachi's vector supercomputers for comparable power consumption and floor footprint.

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Flexible operation and system configuration for an efficient, open environment.

Partitioned operation

The SR8000 Series' nodes can be divided into groups or partitions. Each can be used to execute independent codes, allowing flexible configuration to application requirements.

Interactive and batch operation

The SR8000 Series supports both methods of "Interactive operation" and "Batch operation". Interactive operation is achieved by remote login from workstations or PCs connected over a network, and the starting of jobs directly by command. In batch, the Network Queuing System (NQS) software is used to submit jobs from the workstation or PC to a queue for execution in a partition of the SR8000 Series. In either case, the monitoring of job progress is possible.

Flexible network connections

Ethernet, Fast Ethernet, Gigabit Ethernet, ATM and HIPPI, all with the TCP/IP protocol, are amongst the networks supported by the SR8000 Series.

High reliability

This is a vital consideration in any complex system comprising many components.

In the SR8000 Series, a high level is achieved through the use of technologies such as :

(1) A RISC microprocessor with parity checking in the data & address lines, as well as arithmetic units.

(2) Memory with Error Correction Code (ECC) capable of correcting burst errors (errors of multiple consecutive bits).

(3) An inter node network capable of re-transmitting messages when errors are detected.

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Software that realizes the maximum exploitation of the capabilities of the Super Technical Server.
[Software　Product]

HI-UX/MPP for SR8000

HI-UX/MPP for SR8000 is a micro kernel based operating system, optimized for parallel distributed processing. It delivers high performance and reliable, flexible, operation while complying with relevant international and industrial standards. These include X11R6, Motif 1.2 and NFS version 3.

- 64-bit addressing

The large numerical problems to be solved require high capacity memory for efficient processing. 64-bit addressing allows both this and dramatically larger capacity file systems to be implemented. To ease migration from previous systems, 32-bit codes can be executed.

- Single system

To enable easy system use and administration, the SR8000 Series presents a single system. Remote operation is possible over a network.

- Scalability

HI-UX/MPP for SR8000 is designed for efficient scaling over the wide range of SR8000 Series configurations. Starting at 4 nodes (32 GFLOPS), with growth possible to 512 nodes (7.3 TFLOPS), a system can be configured to match increasing processing needs.

- SR8000 Series management functions

Centre operation management is aided by functions including, amongst others, resource allocation, usage control and accounting. Unattended automatic operation is possible. Security features, including role based system administration, and backup/archiving function by ADSM* client are provided. * ADSM : ADSTAR Distributed Storage Manager

Languages

Optimizing compilers for FORTRAN 77, FORTRAN 90, C, C++, Kuck and Associates C++ and Parallel FORTRAN are all supported on these SR8000 Series. Parallel FORTRAN translates HPF into FORTRAN90 before compilation. (Parallel FORTRAN translates programs of HPF into FORTRAN90 program.) These optimizing compilers all support automatic code intra-node parallelization, for execution on the multiple microprocessors within each node. In addition, automatic pseudo vectorization is supported to get maximum microprocessor performance. Cross compilers on Hitachi workstation are also available. Kuck and Associates C++ based on ISO/IEC 14882-1998 provides optimizing function for SR8000 Series.

Parallelization support and development environment

- MPI-2

The SR8000 Series supports the MPI-2 (issued July 1997) communications library for parallel program codes, an extension of the original Message Passing Interface (MPI). MPI-2 builds on MPI with the addition of features such as parallel input/output and dynamic process generation. High speed data communication is achieved by the use of the SR8000 Series' remote DMA to transfer data directly between user address spaces.

- PVM

The Parallel Virtual Machine (PVM) environment is supported by the SR8000 Series for developing parallel message passing codes. The SR8000 Series' PVM, realizes high speed data communication by the use of the SR8000 Series' remote DMA to transfer data directly between user address spaces.

- Application Program Development Environment

A support environment for the development, execution, and tuning the performance of application codes is provided on the SR8000 Series.

- Parallel Debugger

Parallel debugger is a symbolic debugger for both serial and parallel codes.

Matrix calculation libraries

- MATRIX/MPP

This library provides optimized routines. - Basic array operations. - Eigenvalues and eigenvectors. - Direct methods for linear systems. - Iterative methods for linear systems with large scale sparse coefficient matrix. - Fast Fourier transforms. - Pseudo-random numbers.

- MATRIX/MPP/SSS

This library is a high performance library of sparse solver for linear systems with large scale sparse matrices. This type of equation often appears in the field of structure analysis. As with MATRIX/MPP, this library is optimized for the SR8000 Series. This library provides the following optimized routines. - Skyline method. - Sparse direct solver.

- Common interface

The SR8000 Series' matrix libraries have identical interfaces to the equivalent Hitachi libraries for the S-3000 vector supercomputers, the SR2201 parallel processors and 3050 series workstations. Porting is achieved by a simple recompilation.

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Examples of supported ISV packages

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Contact us hpc-ep-info@ml.itg.hitachi.co.jp

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