HITACHI : Features : HITACHI SR11000 Series Super Technical Server model K1 : High Performance Computer

The SR11000 model K1 has been developed using advanced hardware design techniques. Processor performance, memory throughput, node*1 performance and inter-node network performance have been optimized and balanced to provide a high effective performance.

SR11000 model K1 excels especially in the following points.
1)	The POWER5+™ high performance processor delivers excellent performance, running at 2.1 GHz.
2)	It has a node architecture which has high performance and high scalability and thus allows the automatic parallelizing compiler to obtain maximum performance.
3)	Inter-node network which has high performance and high scalability to obtain optimal system performance.
4)	High density packaging technologies achieve a world class theoretical peak performance per unit area.
5)	It can be applied to scientific and engineering applications that use various programming models.
6)	It provides technologies for centralized administration of tasks such as budget and result management, automatic system operation and node maintenance to keep the system operational.

*1	Nodes are independent processing units which are combined to form a parallel processor.

Adoption of a world-class high performance POWER5+ microprocessor

At the heart of “the SR11000 model K1” is the POWER5+ microprocessor implemented in state-of-the-art 90nm CMOS technology with copper interconnects and SOI*2, running at a high clock rate of 2.1GHz to deliver excellent performance.

It has the following features, and greatly contributes to the high speed processing of the SR11000 model K1.

1)	super scalar processing
2)	concurrent execution of 64-bit and 32-bit applications
3)	large capacity on-chip L2 cache
4)	simultaneous multi-threading function*3
5)	high memory throughput
6)	high-speed inter-processor connection interface

POWER5+ processor

*2	Silicon On Insulator
*3	Simultaneous multi-threading function allows for the concurrent execution of two independent instruction threads on one physical processor.

Large capacity L3 cache

Each node has a total of 288 MB of L3 cache.
Due to this large capacity L3 cache, effective memory latency is shortened and thus performance is enhanced.

High-speed inter-node network

For parallel processing, a network that can interconnect a large number of nodes is a key technology.
The SR11000 model K1 has a "multi-stage network" and reduces transfer data collisions on the network. This network has a maximum inter-node transfer speed of 12GB/s (in each direction) X 2, and thus contributes greatly to system performance. In addition, since this high speed network optimizes the balance between processing and communication of a parallel program, large-scale scientific and engineering calculations that use many inter-node data transfers can be processed at high speed.

Effective performance improved using memory prefetch function and software pipeline

A memory prefetch function, by which memory data is fetched to the cache in advance, can be fully utilized with software pipeline techniques. These techniques allow the arithmetic units to operate in a pipelined manner, to achieve high-speed processing.

Pseudo Vector Processing Function

By using a software assisted prefetch function that efficiently uses prefetch instructions to indicate memory lookahead hints*4,the hardware based memory lookahead mechanism can eliminate waits between successive instructions by pipelining data fetches from memory.

*4	Array reference information is placed in the hint fields of prefetch instructions in order to pass hints to the hardware based memory lookahead mechanism.

128-fold performance range

Theoretical peak performance of this server scales from 537.6GFLOPS*5(4 nodes) to 68.8TFLOPS*6(512 nodes) and thus this allows a user to choose the most cost-effective size of machine that meets an application's requirements.

*5	1GFLOPS is an ability to execute one billion floating-point arithmetic operations per second.
*6	1TFLOPS is an ability to execute one trillion floating-point arithmetic operations per second.

High-speed memory system

Low memory latency and high memory throughput are realized by connecting CPUs and high-bandwidth memory by switches with sufficient bandwidth not to act as a bottleneck on performance.

Compact Packaging

Using advanced packaging technologies, 128 processors (8 nodes) are mounted in one cabinet. High density packaging technologies are used to achieve a world class theoretical peak performance per unit area of 710GFLOPS/m². Therefore, a large high-speed computer with TFLOPS-level processing capability can be installed in a small area.

Trademark legend)
• POWER5+ is a trademark of the International Business Machines Corp. in the United States and other countries.
• Other product and company names mentioned in this document may be the trademarks of their respective owners.

HITACHI Super Technical Server SR11000 model K1 : Features