HDL6V5583/5583E

Description

1. High density

This octal 3-level pulser features low-voltage input logic interface, level translators, MOSFET gate drive buffers, and high-voltage high-current P-channel and N-channel MOSFETs. Besides, active ground clamps,floating voltage regulators, output blocking high-voltage diodes, noise-cut low-voltage diodes, active output termination, power-on reset function, and thermal protection are incorporated. This high density facilitates downsize and cost reduction.

2. High performance

Matched output current and output impedance of P-channel and N-channel MOSFETs, and active ground clamps result in high pulse symmetry and low 2nd-order harmonics. Besides, active ground terminations working with active ground clamps suppress output noise in receiving period. Moreover, synchronizing input data with a clock signal improves output jitter and delay mismatch.

3. Power supply sequence free

Power supply sequence is not required by power-on reset function.

Features

• Octal-channel integration
• 0 to ±100V output voltage
• ±1.8A source and sink peak current
• ±1A source and sink peak current for active ground clamping
• 500Ω active output termination working with active ground clamping
• Up to 20MHz operating frequency (±60V output, 220pF load)
• 1.8V to 5V CMOS logic interface
• Integrated floating voltage regulator (user-selectable)
• Input data synchronization with up to 100MHz clock (user-selectable)
• Integrated output blocking high-voltage diodes
  (5583: In GND clamp stage only, 5583E: In all stages)
• Integrated noise-cut low-voltage diodes
• Power-up/down sequence free
• 4-mode output drive current control
• Thermal protection
• Latch-up free (SOI CMOS technology)
• 52-lead 8mm × 8mm VQFN package (RoHS compliant)

• Download the brochure ”HDL6V5583/5583E“ (PDF type, 86KB)

• Contact us for datasheet and further information

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