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CMOS ASIC |
Latest low-power-consumption, high-speed CMOS technology, high-density package technology
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Main Specifications |
| Item |
Specification |
| Model |
HDL4H HDL4K HDL4M
(under development) |
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Integration
level
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2,200K gates 8,300K gates 20,000K gates |
| Process |
0.35umCMOS metal 5-layer wiring
0.18umCMOS metal 6-layer wiring
0.14umCMOS metal 7-layer wiring |
| Chip size |
15.7 mm square 17.3
mm square -- |
| Speed |
120 ps/gate 72 ps/gate 45 ps/gate |
| Package |
type (pin count) BGA (1,225 pins)
C-CSP (1,672 pins) C-CSP (1,672 pins) |
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Features |
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CMOS ASICs with several times the performance and level of integration of previous products were developed using the latest low-power-consumption, high-speed CMOS technology and high-density package technology.
These ASICs offer a level of integration and package development to meet the needs of various products from the System Division.
They are used in a variety of information devices including high-performance computer, servers, and switching and transmission devices, and contribute to higher performance, smaller size, and lower price of the application products.
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Technology employed |
Optical transmission module GaAsIC: Mach-Zehnder modulator drive IC
Optical reception module GaAsIC: Signal amplification and timing extraction IC
Silicon IC: IC for function for multiplexing and separating digital signals, and identification function for correctly converting a weak analog signal to a digital signal
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CMOS ASIC |
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HDD Read Write preamplifier |
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related links |
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HITACHI Global Site
